http://www.gnucap.com/dokuwiki/ 2026-04-16T04:51:07-05:00 FeedCreator 1.7.2-ppt DokuWiki 2025-07-30T11:22:12-05:00 2025-07-30T11:22:12-05:00 2025-07-30T11:22:12-05:00 http://www.gnucap.com/dokuwiki/doku.php/gnucap:projects:nlnet:gnucap-performance?rev=1753892532&do=diff

Verilog-AMS in Gnucap (III) Verilog-AMS is a widely used standardised modelling language for physical systems, such as electronic circuits. In this project we will continue the work on a first free/libre reference implementation. The overall goals are to improve simulation in terms of speed and feature coverage.

2023-01-09T09:08:24-05:00 2023-01-09T09:08:24-05:00 2023-01-09T09:08:24-05:00 http://www.gnucap.com/dokuwiki/doku.php/gnucap:projects:nlnet:paramset_implementation?rev=1673276904&do=diff

paramset implementation This section relates to task 1a in verilogams. parsing The “paramset” command does the read-in, similar to the ”.model” command in spice, but only on top level (according to the standard). If a paramset instance refers to a spice model, it will create a MODEL_CARD as a fallback (this will be addressed and fixed in task2f). In normal mode, paramset creates a PARAMSET object (derived from BASE_SUBCKT) that can be instanciated inside modules.

2024-05-14T13:00:20-05:00 2024-05-14T13:00:20-05:00 2024-05-14T13:00:20-05:00 http://www.gnucap.com/dokuwiki/doku.php/gnucap:projects:nlnet:verilogams?rev=1715709620&do=diff

In late '22, we have secured some funding from the NLnet Foundation alowing us to work on Verilog-AMS support. Within the next months, we will work on two tasks. One task is a compiler for behavioural models, the other is Verilog support on the simulator level.

2025-05-17T15:55:14-05:00 2025-05-17T15:55:14-05:00 2025-05-17T15:55:14-05:00 http://www.gnucap.com/dokuwiki/doku.php/gnucap:projects:nlnet:verilogamscontd?rev=1747515314&do=diff

In late '23, we have secured more funding from the NLnet Foundation alowing us to continue our work on Verilog-AMS support. We will work on three tasks. The first two will advance the model compiler and simulator, the third task will involve other projects with a focus on interoperability.